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SH7713 Datasheet(PDF) 123 Page - Renesas Technology Corp

Part # SH7713
Description  Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series
PDF  904 Pages
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

SH7713 Datasheet(HTML) 123 Page - Renesas Technology Corp

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Section 3 DSP Operating Unit
Rev.1.50 Aug. 30, 2006 Page 83 of 860
REJ09B0288-0150
Table 3.5
Repeat Control Macros
Instruction
Operation
Number of
Execution
States
REPEAT RptStart, RptEnd, #imm Specifies RptStart as repeat start instruction,
RptEnd as repeat end instruction, and 8-bit
immediate data #imm as number of repetitions.
This macro is extended to three instructions:
LDRS, LDRE, and SETRC which are converted
correctly.
3
REPEAT RptStart, RptEnd, Rm
Specifies RptStart as repeat start instruction,
RptEnd as repeat end instruction, and the [11:0]
bits of Rm as number of repetitions. This macro
is extended to three instructions: LDRS, LDRE,
and SETRC which are converted correctly.
3
Using the repeat macros shown in table 3.5, examples 1 to 4 shown above can be simplified to
examples 5 to 8 as shown below.
• Example 5: Repeat loop consisting of 4 or more instructions (extended to the instruction
stream shown in example 1, above)
REPEAT RptStart, RptEnd, #4
Instr0
;
RptStart: instr1
; [Repeat start instruction]
... ...
;
... ...
;
instr(N-3)
;
instr(N-2)
;
instr(N-1)
;
RptEnd:
instrN
;[Repeat end instruction]
• Example 6: Repeat loop consisting of three instructions (extended to the instruction stream
shown in example 2, above)
REPEAT RptStart, RptEnd, #4
instr0
;
RptStart: instr1
; [Repeat start instruction]
Instr2
;
RptEnd:
instr3
; [Repeat end instruction]



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