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SH7713 Datasheet(PDF) 302 Page - Renesas Technology Corp |
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SH7713 Datasheet(HTML) 302 Page - Renesas Technology Corp |
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302 / 904 page  Section 8 Interrupt Controller (INTC) Rev.1.50 Aug. 30, 2006 Page 262 of 860 REJ09B0288-0150 8.5.2 Multiple Interrupts When handling multiple interrupts, an interrupt handler should include the following procedures: 1. Branch to a specific interrupt handler corresponding to a code set in INTEVT or INTEVT2. The code in INTEVT or INTEVT2 can be used as an offset for branching to the specific handler. 2. Clear the interrupt source in each specific handler. 3. Save SSR and SPC to memory. 4. Clear the BL bit in SR, and set the accepted interrupt level in the interrupt mask bits in SR. 5. Handle the interrupt. 6. Execute the RTE instruction. When these procedures are followed in order, an interrupt of higher priority than the one being handled can be accepted after clearing the BL bit in step 4. See figure 8.3 on a sample interrupt operation flowchart. |
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