SH7721 datasheet(789/1524 Pages) RENESAS

789 / 1524 page

Section 21

Serial I/O with FIFO (SIOF)

Rev. 3.00 Jan. 18, 2008 Page 727 of 1458

REJ09B0033-0300

21.4.8

Interrupts

The SIOF has one type of interrupt.

(1)

Interrupt Sources

Interrupts can be issued by several sources. Each source is shown as an SIOF status in SISTR.

Table 21.12 lists the SIOF interrupt sources.

Table 21.12 SIOF Interrupt Sources

No. Classification

Bit Name

Function Name

Description

TDREQ

Transmit FIFO transfer

request

The transmit FIFO stores data of

specified size or more.

Transmission

TFEMP

Transmit FIFO empty

The transmit FIFO is empty.

RDREQ

Receive FIFO transfer

request

The receive FIFO stores data of

specified size or more.

Reception

RFFUL

Receive FIFO full

The receive FIFO is full.

TCRDY

Transmit control data

ready

The transmit control register is ready

to be written.

Control

RCRDY

Receive control data

ready

The receive control data register

stores valid data.

TFUDF

Transmit FIFO

underflow

Serial data transmit timing has arrived

while the transmit FIFO is empty.

TFOVF

Transmit FIFO overflow Write to the transmit FIFO is

performed while the transmit FIFO is

full.

RFOVF

Receive FIFO overflow Serial data is received while the

receive FIFO is full.

RFUDF

Receive FIFO

underflow

The receive FIFO is read while the

receive FIFO is empty.

FSERR

FS error

A synchronous signal is input before

the specified bit number has been

passed (in slave mode).

Error

SAERR

Assign error

The same slot is specified in both

serial data and control data.

Whether an interrupt is issued or not as the result of an interrupt source is determined by the SIIER

settings. If an interrupt source is set to 1 and the corresponding bit in SIIER is set to 1, an SIOF

interrupt is issued.

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