SH7721 datasheet(786/1524 Pages) RENESAS

Part #	SH7721

Description	Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series

PDF	1524 Pages

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Manufacturer	RENESAS [Renesas Technology Corp]

Direct Link	http://www.renesas.com

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786 / 1524 page

Section 21

Serial I/O with FIFO (SIOF)

Rev. 3.00 Jan. 18, 2008 Page 724 of 1458

REJ09B0033-0300

(4)

Reception in Slave Mode

Figure 21.12 shows an example of settings and operation for slave mode reception.

Start

Yes

End

No.

Set SIMDR, SISCR, SITDAR,

SIRDAR, SICDAR, and SIFCTR

Set the RXE bit in SICTR to 1

RDREQ = 1?

Transfer

ended?

Clear the RXE bit in SICTR to 0

Set operating mode, serial clock,

slot positions for transmit/receive

data, slot position for control data,

and FIFO request threshold value

Flow Chart

SIOF Settings

SIOF Operation

Issue receive transfer request

according to the receive

FIFO threshold value

Reception

End reception

Read receive data

Set to disable reception

Read SIRDR

Store SIOFRXD receive data in SIRDR

synchronously with SIOFSYNC

Set to enable reception

Enable reception when the

frame synchronous signal is

input

Figure 21.12

Example of Receive Operation in Slave Mode

SH7721 Datasheet(PDF) 786 Page - Renesas Technology Corp

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