SH7721 datasheet(783/1524 Pages) RENESAS

783 / 1524 page

Section 21

Serial I/O with FIFO (SIOF)

Rev. 3.00 Jan. 18, 2008 Page 721 of 1458

REJ09B0033-0300

21.4.7

Transmit and Receive Procedures

(1)

Transmission in Master Mode

Figure 21.9 shows an example of settings and operation for master mode transmission.

Flow Chart

SIOF Settings

SIOF Operation

Start

Set SIMDR, SISCR, SITDAR,

SIRDAR, SICDAR, and SIFCTR

Set operating mode, serial clock,

slot positions for transmit/receive

data, slot position for control data,

and FIFO request threshold value

Set the SCKE bit in SICTR to 1

Start SIOFSCK output

Set the FSE and TXE bits

in SICTR to 1

Clear the TXE bit in SICTR to 0

TDREQ = 1?

Yes

Set SITDR

Transmit SITDR from SIOFTXD

synchronously with SIOFSYNC

Transfer

ended?

End

Set operation start for baud rate

generator

Set the start for frame synchronous

signal output and enable

transmission

Set transmit data

Set to disable transmission

Output serial clock

Output frame synchronous

signal and issue transmit

transfer request*

Transmit

End transmission

No.

Set the FSE bit in SICTR to 0

Set the MSSEL bit in SISCR to 1

Set BRDV=111

and BPRS=00000 in SISCR

Start the setting FSE=0,

TXE=0 and other bit.

Add pulse (0

→1→0)

to the TXRST in SISCR

Reset the master clock source

and baud rate in SISCR

Synchronize this LSI internal

frame with FSE=0 if restarting

transmit later.

Execute internal initialization

of the bit rate generator

if restarting transmit later.

'No' requires further setting

if transmission is not restarted

(No).

When returning to the same

transmit mode from here,

go back to No.4, FSE setting,

on this flowchart.

Go to "Start" on each flowchart.

Yes

Change other

transmit mode?

Note: * When interrupts due to transmit data underflow are enabled, after setting the no. 6 transmit data, the

TXE bit should be set to 1.

Figure 21.9

Example of Transmit Operation in Master Mode

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