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SH7721 Datasheet(PDF) 779 Page - Renesas Technology Corp

Part # SH7721
Description  Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series
PDF  1524 Pages
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

SH7721 Datasheet(HTML) 779 Page - Renesas Technology Corp

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Section 21
Serial I/O with FIFO (SIOF)
Rev. 3.00 Jan. 18, 2008 Page 717 of 1458
REJ09B0033-0300
The number of channels in control data is specified by the CD0E and CD1E bits in SICDAR.
Table 21.8 shows the relationship between the number of channels in control data and bit settings.
Table 21.8
Setting Number of Channels in Control Data
Bit
Number of Channels
CD0E
CD1E
1
1
0
2
1
1
Note:
To use only one channel in control data, use channel 0.
21.4.5
Control Data Interface
Control data performs control command output to the CODEC and status input from the CODEC.
The SIOF supports the following two control data interface methods.
• Control by slot position
• Control by secondary FS
Control data is valid only when data length is specified as 16 bits.
(1)
Control by Slot Position (Master Mode 1, Slave Mode 1)
Control data is transferred for all frames transmitted or received by the SIOF by specifying the slot
position of control data. This method can be used in both SIOF master and slave modes. Figure
21.7 shows an example of the control data interface timing by slot position control.
SIOFSCK
SIOFRxD
SIOFTxD
SIOFSYNC
L-channel
data
R-channel
data
Specifications: TRMD[1:0]=00 or 10,
TDLE=1,
RDLE=1,
CD0E=1,
REDG=0,
TDLA[3:0]=0000,
RDLA[3:0]=0000,
CD0A[3:0]=0001,
FL[3:0]=1110 (Frame length: 128 bits),
TDRE=1,
RDRE=1,
CD1E=1,
TDRA[3:0]=0010,
RDRA[3:0]=0010,
CD1A[3:0]=0011
Control
channel 0
Control
channel 1
1 frame
Slot No.0
Slot No.1
Slot No.2
Slot No.3
Figure 21.7
Control Data Interface (Slot Position)



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