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SH7721 Datasheet(PDF) 833 Page - Renesas Technology Corp |
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SH7721 Datasheet(HTML) 833 Page - Renesas Technology Corp |
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833 / 1524 page ![]() Section 24 USB Host Controller (USBH) Rev. 3.00 Jan. 18, 2008 Page 771 of 1458 REJ09B0033-0300 Bit Bit Name Initial Value R/W Description 2 PLE 0 R/W Periodic List Enable This bit is set to enable the processing of the periodic list. If cleared by HCD, no periodic list processing is carried out after next SOF. HC must check this bit before HC starts to process the list. 0: The periodic list processing is not carried out after next SOF 1: The periodic list processing is carried out after next SOF 1 0 CBSR1 CBSR0 0 0 R/W R/W Control Bulk Service Ratio This bit specifies the service ration of the control and bulk ED. The host controller must compare the ratio specified by the internal calculation whether it has processed several non-vacant control ED in determining whether another control ED is continued to be supplied or switched to bulk ED before any a periodic list is processed. In case of reset, HCD is responsible for restoring this value. 00: 1:1 01: 2:1 10: 3:1 11: 4:1 24.3.3 Hc Command Status Register (USBHCS) The host controller uses USBHCS not only for reflecting the current status of the host controller, but also for receiving a command issued by HCD. A write is for setting HCD. The host controller must guarantee that the bit to which 1 is written to be set and the bit to which 0 is written to is unchanged. HCD must distribute multiple clear commands to the host controller by a previously issued command. The host controller driver can read all bits normally. The SOC bit indicates the number of the frame that has detected the Scheduling Overrun error by the host controller. This occurs when the periodic list has not completed before EOF. When the Scheduling Overrun error is detected, the host controller increments the counter and sets SO bit in the USBHIS register. |
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