SH7721 datasheet(832/1524 Pages) RENESAS

832 / 1524 page

Section 24

USB Host Controller (USBH)

Rev. 3.00 Jan. 18, 2008 Page 770 of 1458

REJ09B0033-0300

Bit

Bit Name

Initial

Value

R/W

Description

BLE

R/W

Bulk List Enable

This bit is set to enable the processing of the bulk list in

the next frame. When this bit is cleared by HCD, the

processing of the bulk list is not carried out after next SOF.

The host controller checks this bit when processing this

list. When disabling, HCD can correct the list. When

USBHBCED indicates ED to be deleted, HCD should

hasten the pointer by updating USBHBCED before re-

enabling the list processing.

0: Bulk list processing is not carried out

1: Bulk list processing is carried out

CLE

R/W

Control List Enable

This bit is set to enable the processing of the control list in

the next frame. If cleared by HCD, the processing of the

control list is not carried out after next SOF. The host

controller must check this bit whenever the list will be

processed. When disabling, HCD can correct the list.

When USBHCCED indicates ED to be deleted, HCD

should hasten the pointer by updating USBHCCED before

re-enabling the list processing.

0: Control list processing is not carried out

1: Control list processing is carried out

R/W

Isochronous Enable

This bit is used by HCD to enable/disable the processing

of isochronous ED. While processing the periodic list, HC

will check the status of this bit when it finds an

isochronous ED (F =1). If set (enabled), the host controller

continues to process ED. If cleared (disabled), the host

controller stops the processing of the periodic list

(currently includes only isochronous ED) and starts to

process the bulk/control list. Setting this bit is guaranteed

to be valid in the next frame (not in the current frame).

0: Processes isochronous ED

1: Processes the bulk/control list

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