SH7721 datasheet(831/1524 Pages) RENESAS

831 / 1524 page

Section 24

USB Host Controller (USBH)

Rev. 3.00 Jan. 18, 2008 Page 769 of 1458

REJ09B0033-0300

Bit

Bit Name

Initial

Value

R/W

Description

RWC

R/W

Remote Wakeup Connected

This bit indicates whether the host controller supports a

remote wakeup signal or not. When the remote wakeup is

supported and used in the system, the host controller must

set this bit between POST in the system firmware. The

host controller clears the bit at the same time of the

hardware reset, however, does not change at the same

time as the software reset.

This function is not supported. Be sure to write 0.

R/W

Interrupt Routing

This bit determines the routing of interrupts generated by

the event registered in USBHIS. HCD clears this bit at the

same time as the hardware reset, however, does not clear

at the same time as the software reset. HCD uses this bit

as a tag to indicate the ownership of the host controller.

0: All interrupts are routed to normal host bus interrupt

mechanism

1: Interrupts are routed to SMI

HCFS1

HCFS0

R/W

Host Controller Functional State

HCD determines whether the host controller has started to

route SOF after having read the SF bit of USBHIS. This bit

can be changed by the host controller only in the

UsbSuspend state. The host controller can move from the

UsbSuspend state to the UsbResume state after having

detected the resume signal from the downstream port. In

the host controller, UsbSuspend is entered after the

software reset so that UsbReset is entered after the

hardware reset. The former resets the route hub.

00: USB Reset

01: USB Resume

10: USB Operational

11: USB Suspend

SH7721 Datasheet(PDF) 831 Page - Renesas Technology Corp

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