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SH7721 Datasheet(PDF) 880 Page - Renesas Technology Corp

Part # SH7721
Description  Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series
PDF  1524 Pages
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

SH7721 Datasheet(HTML) 880 Page - Renesas Technology Corp

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Section 25
USB Function Controller (USBF)
Rev. 3.00 Jan. 18, 2008 Page 818 of 1458
REJ09B0033-0300
25.3.10
Interrupt Select Register 4 (ISR4)
ISR4 selects the interrupt requests to the INTC to be indicated in interrupt flag register 4. When a
bit in ISR4 is cleared to 0, the corresponding interrupt is requested as a USBFI0 interrupt. When a
bit is set to 1, the corresponding interrupt is requested as a USBFI1 interrupt. With the initial
value, each of the interrupt source flags in the interrupt flag register 4 is selected as a USBFI0
interrupt.
Bit
Bit Name
Initial Value R/W
Description
7 to 1
All 0
R
Reserved
These bits are always read as 0. The write value should
always be 0.
0
TMOUT IS
0
R/W
TMOUT Interrupt Select
25.3.11
Interrupt Enable Register 0 (IER0)
IER0 enables the interrupt requests of the interrupt flag register 0. When an interrupt flag is set to
1 while the corresponding bit of each interrupt is set to 1, the interrupt request set in the interrupt
select register 0 is issued.
When an interrupt flag is set to 1 while the corresponding bit of each interrupt is set to 1, the
INTN pin set in the interrupt select register 0 is asserted low and an interrupt request is issued.
Bit
Bit Name
Initial Value R/W Description
7
BRST IE
0
R/W BRST Interrupt Enable
6
EP1 FULL IE
0
R/W EP1 FULL Interrupt Enable
5
EP2 TR IE
0
R/W EP2 TR Interrupt Enable
4
EP2 EMPTY IE
0
R/W EP2 EMPTY Interrupt Enable
3
SETUP TS IE
0
R/W SETUP TS Interrupt Enable
2
EP0o TS IE
0
R/W EP0o TS Interrupt Enable
1
EP0i TR IE
0
R/W EP0i TR Interrupt Enable
0
EP0i TS IE
0
R/W EP0i TS Interrupt Enable



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