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SH7721 Datasheet(PDF) 883 Page - Renesas Technology Corp |
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SH7721 Datasheet(HTML) 883 Page - Renesas Technology Corp |
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883 / 1524 page ![]() Section 25 USB Function Controller (USBF) Rev. 3.00 Jan. 18, 2008 Page 821 of 1458 REJ09B0033-0300 25.3.16 EP0i Data Register (EPDR0i) EPDR0i is an 8-byte transmit FIFO buffer for endpoint 0. EPDR0i holds one packet of transmit data for control-in. Transmit data is fixed by writing one packet of data and setting EP0iPKTE in the trigger register. When an ACK handshake is returned from the host after the data has been transmitted, EP0iTS in interrupt flag register 0 is set. This FIFO buffer can be initialized by means of EP0iCLR in the FCLR0 register. Bit Bit Name Initial Value R/W Description 7 to 0 D7 to D0 Undefined W Data register for control-in transfer 25.3.17 EP0o Data Register (EPDR0o) EPDR0o is an 8-byte receive FIFO buffer for endpoint 0. EPDR0o holds endpoint 0 receive data other than setup commands. When data is received normally, EP0oTS in interrupt flag register 0 is set, and the number of receive bytes is indicated in the EP0o receive data size register. After the data has been read, setting EP0oRDFN in the trigger register enables the next packet to be received. This FIFO buffer can be initialized by means of BP0oCLR in the FCLR0 register. Bit Bit Name Initial Value R/W Description 7 to 0 D7 to D0 Undefined R Data register for control-out transfer 25.3.18 EP0s Data Register (EPDR0s) EPDR0s is a data register specifically for endpoint 0 setup command. EPDR0s holds 8-byte command data sent in the setup stage. However, only the command to be processed by a microprocessor (firmware) is received. The command data to be processed automatically by this module is not stored. Since the setup command mast be received, previous data in the buffer is over written with new data. In other words, when the reception of data in the setup stage starts during read, reception has priority and read data is invalid. Bit Bit Name Initial Value R/W Description 7 to 0 D7 to D0 Undefined R Data register for storing the setup command at the control-out transfer Note: The EPDR0s register should be read in 8-byte units. If reading is stopped before it completes, data received in the subsequent setup stage is not read successfully. |
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