SH7721 datasheet(886/1524 Pages) RENESAS

886 / 1524 page

Section 25

USB Function Controller (USBF)

Rev. 3.00 Jan. 18, 2008 Page 824 of 1458

REJ09B0033-0300

25.3.25

EP1 Receive Data Size Register (EPSZ1)

EPSZ1 is a receive data size resister for endpoint 1. EPSZ1 indicates the number of bytes received

from the host. FIFO of endpoint 1 has a dual-buffer configuration. The size of the received data

indicated by this register is the size of the currently selected side (can be read by CPU).

Bit

Bit Name

Initial Value R/W

Description

7 to 0



All 0

Number of received bytes for endpoint 1

25.3.26

EP4 Receive Data Size Register (EPSZ4)

EPSZ4 is a receive data size resister for endpoint 4. EPSZ4 indicates the number of bytes received

from the host. FIFO of endpoint 4 has a dual-buffer configuration. The size of the received data

indicated by this register is the size of the currently selected side (can be read by CPU).

Bit

Bit Name

Initial Value R/W

Description

7 to 0



All 0

Number of received bytes for endpoint 4

25.3.27

Trigger Register (TRG)

TRG generates one-shot triggers FIFO for each endpoint of EP0s, EP0i, EP0o, EP1, EP2, and

EP3. The packet enable trigger for the IN FIFO register and read complete trigger for the OUT

FIFO register are triggers to be given.

Bit

Bit Name

Initial Value R/W Description



Reserved

The write value should always be 0.

EP3 PKTE

EP3 Packet Enable

EP1 RDFN

EP1 Read Complete

EP2 PKTE

EP2 Packet Enable



Reserved

The write value should always be 0.

EP0s RDFN

EP0s Read Complete

EP0o RDFN

EP0o Read Complete

EP0i PKTE

EP0i Packet Enable

SH7721 Datasheet(PDF) 886 Page - Renesas Technology Corp

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