SH7721 datasheet(890/1524 Pages) RENESAS

890 / 1524 page

Section 25

USB Function Controller (USBF)

Rev. 3.00 Jan. 18, 2008 Page 828 of 1458

REJ09B0033-0300

25.3.33

Endpoint Stall Register 1 (EPSTL1)

EPSTL stalls each endpoint. The endpoint in which the stall bit is set to 1 returns a stall handshake

to the host from the next transfer when 1 is written to. For detailed operation, see section 25.8,

Stall Operations.

Bit

Bit Name

Initial Value R/W

Description

7 to 2



All 0

Reserved

This bit is always read as 0. The write value should

always be 0.

EP5 STL

R/W

EP5 Stall

Sets EP5 stall

EP4 STL

R/W

EP4 Stall

Sets EP4 stall

25.3.34

Configuration Value Register (CVR)

CVR is a register to store the Configuration/Interface/ value to be set when the Set

Configuration/Set Interface command is normally received.

Bit

Bit Name

Initial Value R/W Description

CNFV1

CNFV0

Configuration Value

The configuration setting value is stored when the Set

Configuration command has been received.

CNFV is updated when the SETC bit in the interrupt

flag register is set to 1.

INTV1

INTV0

Interface Value

The interface setting value is stored when the Set

Interface command has been received.

INTV is updated when the SETI bit in the interrupt flag



Reserved

This bit is always read as 0.

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