SH7721 datasheet(892/1524 Pages) RENESAS

892 / 1524 page

Section 25

USB Function Controller (USBF)

Rev. 3.00 Jan. 18, 2008 Page 830 of 1458

REJ09B0033-0300

25.3.36

Control Register 0 (CTLR0)

CTLR0 sets functions of ASCE, PWMD, RSME, and RWUP.

Bit

name

Initial

value

R/W

Description

7 to 5

All 0

Reserved

These bits are always read as 0. The write value should

always be 0.

RWUPS

Remote Wakeup Status

Status bit to indicate that the remote wakeup from the

host is enabled/disabled. Indicates 0 when the remote

wakeup is disabled with Device Remote Wakeup by the

Set Feature/Clear Feature request and indicates 1 when

it is enabled.

RSME

R/W

Resume Enable

Bit to clear the suspend state (performs the remote

wakeup)

When this bit is written to 1, a resume register is set.

When this bit will be used, be sure to hold to 1 for one

clock or more at 12 MHz in minimum and then clear to 0

again.



Reserved

This bit is always read as 0. The write value should

always be 0.

ASCE

R/W

Automatic Stall Clear Enable

When this bit is set to 1, the stall handshake is returned

to the host and the stall setting bit (EPSTLR/EPXSTL) of

the returned endpoint is automatically cleared. Control in

a unit of endpoint is disabled as this bit is common for all

endpoints. When this bit is set to 0, be sure to clear the

stall setting bit of each endpoint by using software.

This bit should be set to 1 before each stall bit in EPSTL

is set to 1.



Reserved

This bit is always read as 0. The write value should

always be 0.

SH7721 Datasheet(PDF) 892 Page - Renesas Technology Corp

SH7721 Datasheet(HTML) 892 Page - Renesas Technology Corp

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL