SH7721 datasheet(893/1524 Pages) RENESAS

893 / 1524 page

Section 25

USB Function Controller (USBF)

Rev. 3.00 Jan. 18, 2008 Page 831 of 1458

REJ09B0033-0300

25.3.37

Control Register 1 (CTLR1)

CTLR1 makes settings of internal timer which is used in the isochronous transfer.

Bit

name

Initial

value

R/W

Description

7 to 2



All 0

Reserved

These bits are always read as 0. The write value

should always be 0.

TMR ACLR

R/W

Timer Auto Clear

Selects method to clear TMR (timer register).

0: Not cleared. When clearing TMR, write 0 to TMR by

CPU.

1: Automatically cleared every time when SOF is

received.

TMR EN

R/W

Timer Enable

TMR EN is TMR (timer register) enable bit.

0: Timer operation is disabled

1: Timer operation is enabled

25.3.38

Endpoint Information Register (EPIR)

EPIR is a register to set the configuration information for each endpoint. 5 bytes of the

information are required for one endpoint and the formats are listed in tables 25.3 and 25.4. Write

the data in order from endpoint 0. Do not write more than 5 (bytes)

× 10 (endpoints) = 50 bytes.

Write this information once at power-on reset. Do not write it again afterwards.

Write data of one endpoint is described below. EPIR writes data in the same address in order.

Therefore though there is only one EPIR register, write data for registration number N (N is from

0 to 9) is listed as EPIRN0 to EPIRN4 (EPIR [registration number] [write order]) for the purpose

of explaining. Write data in order from EPIR00.

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