SH7721 datasheet(910/1524 Pages) RENESAS

Part #	SH7721

Description	Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series

PDF	1524 Pages

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Manufacturer	RENESAS [Renesas Technology Corp]

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Section 25

USB Function Controller (USBF)

Rev. 3.00 Jan. 18, 2008 Page 848 of 1458

REJ09B0033-0300

25.4.6

EP3 Interrupt-In Transfer

USB function

Application

IN token reception

Data transmission to host

Set EP3 transmission

complete flag

(IFR0/EP3 TS = 1)

Write data to EP3 data

Write 1 to EP3 packet

enable bit

(TRG/EP3 PKTE = 1)

Clear EP3 transmission

complete flag

(IFR1/EP3 TS = 0)

Write data to EP3 data

Write 1 to EP3 packet

enable bit

(TRG/EP3 PKTE = 1)

Valid data

in EP3 FIFO?

Is there data

for transmission

to host?

Is there data

for transmission

to host?

Yes

NAK

ACK

Note: This flowchart shows just one example of interrupt transfer processing. Other possibilities include an

operation flow in which, if there is data to be transferred, the EP3 DE bit in the USB data status register

is referenced to confirm that the FIFO is empty, and then data is written to the FIFO.

Interrupt request

Figure 25.13

EP3 Interrupt-In Transfer Operation

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