SH7721 datasheet(915/1524 Pages) RENESAS

Part #	SH7721

Description	Renesas 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7700 Series

PDF	1524 Pages

Scroll/Zoom	100%

Manufacturer	RENESAS [Renesas Technology Corp]

Direct Link	http://www.renesas.com

Logo

915 / 1524 page

Section 25

USB Function Controller (USBF)

Rev. 3.00 Jan. 18, 2008 Page 853 of 1458

REJ09B0033-0300

SOF reception

In-token reception

FIFO A side

FIFO B side

Set EP5 transmit

request flag

(IFR3/EP5 TR = 1)

Clear time out flag

(IFR4/TMOUT = 0)

Clear SOF packet detection

flag (IFR2/SOF = 0)

Write 1 to EP5

CPU clear

(FCLR1/EP5CCLR)

FIFO A side

Interrupt request (Time out)

Interrupt request (FIFO)

USB function

Firmware

No valid data

in EP5 FIFO

0-byte data

transmission to host

FIFO B side

0-byte data

transmission

Read time stamp register

H, L (TSRH, TSRL)

Time stamps do not match

Write one packet

of data to EP5 data

From

figure 25.16

In-token reception

Set EP5 transmit

request flag

(IFR3/EP5 TR = 1)

No valid data

in EP5 FIFO

0-byte data

transmission to host

0-byte data

transmission

FIFO buffer

switch over

SOF reception

Figure 25.17

EP5 Isochronous-In Transfer Operation (SOF in Broken)

SH7721 Datasheet(PDF) 915 Page - Renesas Technology Corp

SH7721 Datasheet(HTML) 915 Page - Renesas Technology Corp

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL