SH7721 datasheet(919/1524 Pages) RENESAS

919 / 1524 page

Section 25

USB Function Controller (USBF)

Rev. 3.00 Jan. 18, 2008 Page 857 of 1458

REJ09B0033-0300

the internal status bit to be cleared with a Clear Feature command (2-1, 2-2, and 2-3 in figure

25.16).

(1) Transition from normal operation to stall

(1-1)

Transaction request

USB

Reference

(1-2)

STALL handshake

Stall

To 2 of (2-1)

To (2-1) or (3-1)

Normal status restored

(1-3)

(2) When Clear Feature is sent after EPSTL is cleared

(2-1)

STALL handshake

Transaction request

(2-2)

Clear Feature command

(2-3)

(3) When Clear Feature is sent before EPSTL is cleared to 0

(3-1)

1. 1 written to EPnSTL

by application

1. IN/OUT token

received from host

2. EPnSTL referenced

1. Transmission of

STALL handshake

1. Internal status bit

cleared to 0

1. Internal status bit

cleared to 0

2. EPnSTL not

changed

1. EPnSTL cleared to

0 by application

2. IN/OUT token

received from host

3. Internal status bit

already set to 1

4. EPnSTL not

referenced

5. Internal status bit

not changed

To (1-2)

Internal status bit

EPnSTL

→ 1

Internal status bit

EPnSTL

Internal status bit

→ 1

EPnSTL

Internal status bit

EPnSTL

→ 0

Internal status bit

EPnSTL

Internal status bit

→ 0

EPnSTL

Internal status bit

→ 0

EPnSTL

STALL handshake

Stall

(1-4)

Internal status bit

→ 1

EPnSTL

1. 1 set in CTLR/ASCE

2. 1 set in EPnSTL

3. EPnSTL cleared to 0

automatically

4. Internal status bit set to 1

5. Transmission of STALL

handshake

Note: The CTLR/ASCE bit should be set to 1 before

the EPnSTL bit (each stall bit) in EPSTL is set to 1.

1. 0 set in CTLR/ASCE

2. 1 set in EPnSTL

3. Internal status bit set to 1

4. Transmission of STALL

handshake

Figure 25.18

Forcible Stall by Application

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