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SH7721 Datasheet(PDF) 255 Page - Renesas Technology Corp |
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SH7721 Datasheet(HTML) 255 Page - Renesas Technology Corp |
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255 / 1524 page  Section 4 Memory Management Unit (MMU) Rev. 3.00 Jan. 18, 2008 Page 193 of 1458 REJ09B0033-0300 Start SH = 0 and (MMUCR.SV = 0 or SR.MD = 0)? VPNs and ASIDs match? V = 1? User or privileged? D = 1? C = 1? Memory access Cache access Initial page write exception TLB protection violation exception PR? TLB protection violation exception R/W? R/W? R/W? R/W? PR? TLB invalid exception TLB miss exception CPU address error VPNs match? No No No No (Non-cacheable) Yes (Cacheable) Yes Yes Yes Yes Yes No Address error? Yes No No User mode Privileged mode 01/11 00/10 00/01 10 11 WW W W R RR R Figure 4.13 MMU Exception Generation Flowchart |
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