7477 datasheet(102/354 Pages) RENESAS

102 / 354 page

1-85

7470/7471/7477/7478 GROUP USER’S MANUAL

HARDWARE

1.12 Timers

(3) Timer 34 mode register (T34M: Address 00F916)

The Timer 34 mode register is a register consisting of bits that control a timer count source and a

count operation.

Figure 1.12.13 shows a structure of Timer 34 mode register.

Fig. 1.12.13 Structure of Timer 34 mode register

b7 b6 b5 b4 b3 b2 b1 b0

Name

Function

At reset

Timer 34 mode register (T34M) [Address

Timer 34 mode register

Timer 3 count stop

bit

Timer 3 count

source selection bits

Timer 4 count stop

bit

Timer 4 count

source selection bits

Timer 4 pulse width

measurement mode

selection bit

0 : Count start

1 : Count stop

0 : Count start

1 : Count stop

Notes 1:

When Timer 1 overflow is selected as a Timer 2

count source, the Timer 4 count source is the Timer 1

overflow regardless of the value of bit 6 of the

Timer mode register 2.

Since the 7470/7477 group is not provided the sub-clock

generating circuit, f(X CIN) cannot be used.

1, 2

b2 b1

0 0 :

f(XIN)/16 or f(XCIN)/16

0 1 :

f(XCIN)

1 0 :

Timer 1 overflow or

Timer 2 overflow

1 1 :

P33/CNTR1 external

clock

(Note 2)

b4 b3

0 0 :

Timer 3 overflow

0 1 :

f(XIN)/16 or f(XCIN)/16

1 0 :

Timer 1 overflow or

Timer 2 overflow

1 1 :

P33/CNTR1 external

clock

(Notes 1, 2)

0 : Timer mode

1 : External pulse width

measurement mode

P13/T1 port output

selection bit

0 : P13 port

1 : T1(Timer 4 overflow divided

by 2 or PWM output)

4, 5

00F916]

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