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7477 Datasheet(PDF) 104 Page - Renesas Technology Corp

Part # 7477
Description  8-BIT SINGLE-CHIP MICROCOMPUTER 740 FAMILY / 7470 SERIES
PDF  354 Pages
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

7477 Datasheet(HTML) 104 Page - Renesas Technology Corp

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1-87
7470/7471/7477/7478 GROUP USER’S MANUAL
HARDWARE
1.12 Timers
(6) Input latch register (ILR: Address 00D616)
The Input latch register consists of bits that latch the levels of the INT 0, INT1, CNTR0 and CNTR1
pins when the Timer 4 overflows.
Figure 1.12.16 shows a structure of Input latch register.
Fig. 1.12.16 Structure of Input latch register
Nothing is allocated for these bits. These
are write disabled bits and are undefined at
reading.
b7 b6 b5 b4 b3 b2 b1 b0
Name
Function
At reset
Input latch register (ILR) [Address
2
P30/INT0 latch bit
1
3
Input latch register
?
W
R
B
0
4
to
7
!
P31/INT1 latch bit
P32/CNTR0 latch bit
P33/CNTR1 latch bit
?
!
?
!
?
!
?
!
?
When b0 of EG (Note) is “0”:
reverse level on INT0 pin
When b0 of EG (Note) is “1”:
level on INT0 pin
When b1 of EG (Note) is “0”:
reverse level on INT1 pin
When b2 of EG (Note) is “0”:
reverse level on CNTR 0 pin
When b2 of EG (Note) is “1”:
level on CNTR0 pin
When b3 of EG (Note) is “0”:
reverse level on CNTR 1 pin
When b3 of EG (Note) is “1”:
level on CNTR1 pin
Note: EG is the Edge polarity selection register.
00D616]
When b1 of EG (Note) is “1”:
level on INT1 pin



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