7477 datasheet(302/354 Pages) RENESAS

302 / 354 page

7470/7471/7477/7478 GROUP USER’S MANUAL

3-8

APPENDIX

3.1 Control registers

Fig. 3.1.13 Structure of Serial I/O control register

Fig. 3.1.14 Structure of UART control register

b7 b6 b5 b4 b3 b2 b1 b0

Serial I/O control register (SIOCON) [Address

At reset

Serial I/O control register (7477/7478 group)

Name

Function

BRG count source

selection bit (CSS)

0 : f(XIN)/4 or f(XCIN)/4

1 : f(XIN)/16 or f(XCIN)/16

Serial I/O

synchronous clock

selection bit (SCS)

Transmit interrupt

source selection

bit (TIC)

Transmit enable bit (TE)

Receive enable bit (RE)

Serial I/O enable

bit (SIOE)

Serial I/O mode

selection bit (SIOM)

SRDY output enable

bit (SRDY)

VIn the UART mode,

this bit is invalid.

•In clock synchronous mode

0 : BRG output divided by 4

1 : External clock input

•In UART mode

0 : BRG output divided by 16

1 : External clock input

divided by 16

0 : P17/SRDY pin operates

as ordinary I/O pin

1 : P17/SRDY pin operates

as SRDY output pin

0 : When transmit buffer

has emptied

1 : When transmit shift

operation is completed

0 : Transmit disabled

1 : Transmit enabled

0 : Receive disabled

1 : Receive enabled

0 : Clock asynchronous

serial I/O (UART)

1 : Clock synchronous

0 : Serial I/O disabled

(pins operates as ordinary

I/O pins P14–P17)

1 : Serial I/O enabled

(pins operates as serial

I/O pins RXD - SRDY)

(Note)

Note: Port P14–P17 are operates as the serial I/O pin only when

the serial I/O enable bit is “1” (enable state).

At this time, Port P1 7 is also used as an ordinary I/O port.

In the UART mode, port P1 6 is used as an ordinary I/O port

when the internal clock is selected.

00E216]

b7 b6 b5 b4 b3 b2 b1 b0

UART control register (UARTCON) [Address

At reset RW

UART control register (7477/7478 group)

Name

Function

Character length

selection bit (CHAS)

0: 8 bits

1: 7 bits

Parity enable bit

(PARE)

0: Parity checking disabled

1: Parity checking enabled

Stop bit length

selection bit (STPS)

0: 1 stop bit

1: 2 stop bits

Nothing is allocated for these bits. These are write

disabled bits. When these bits are read out, the

values are “1.”

Parity selection bit

(PARS)

0: Even parity

1: Odd parity

111 1

00E316]

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