33937 datasheet(9/47 Pages) FREESCALE

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Analog Integrated Circuit Device Data

Freescale Semiconductor

33937

ELECTRICAL CHARACTERISTICS

STATIC ELECTRICAL CHARACTERISTICS

CHARGE PUMP

Charge Pump

High Side Switch On Resistance

Low Side Switch On Resistance

Regulation Threshold Difference(15), (17)

RDS(on)_HS

RDS(on)_LS

VTHREG

–

250

6.0

5.0

500

9.4

900

Charge Pump Output Voltage(16), (17)

IOUT = 40 mA, 6.0 V < VSYS < 8.0 V

IOUT = 40 mA, VSYS > = 8.0 V

VCP

8.5

9.5

–

GATE DRIVE

High Side Driver On Resistance (Sourcing)

VPWR = VSUP = 16 V, -40°C ≤ TA ≤ 25°C

VPWR = VSUP = 16 V, 25°C < TA ≤ 135°C

RDS(ON)_H_SRC

–

6.0

8.5

High Side Driver On Resistance (Sinking)

VPWR = VSUP = 16 V

RDS(ON)_H_SINK

–

3.0

High Side Current Injection Allowed Without Malfunction(17), (18)

IHS_INJ

–

0.5

Low Side Driver On Resistance (Sourcing)

VPWR = VSUP = 16 V, -40°C ≤ TA ≤ 25°C

VPWR = VSUP = 16 V, 25°C < TA ≤ 135°C

RDS(ON)_L_SRC

–

6.0

8.5

Low Side Driver On-Resistance (Sinking)

VPWR = VSUP = 16 V

RDS(ON)_L_SINK

–

3.0

Low Side Current Injection Allowed Without Malfunction(17), (18)

ILS_INJ

–

0.5

Gate Source Voltage, VPWR = VSUP = 40 V

High Side, IGATE = 0(19)

Low Side, IGATE = 0

VGS_H

VGS_L

14.8

15.4

16.5

High Side Gate Drive Output Leakage Current, Per Output(20)

IHS_LEAK

–

µA

Notes

15.

When VLS is this amount below the normal VLS linear regulation threshold, the charge pump is enabled.

16.

VSYS is the system voltage on the input to the charge pump. With recommended external components (1.0 µF, MUR 120 diode). The

Charge Pump is designed to supply the gate currents of a system with 100 A FETs in a 12 V application.

17.

This parameter is a design characteristic, not production tested.

18.

Current injection only occurs during output switch transitions. The IC is immune to specified injected currents for a duration of

approximately 1.0µs after an output switch transition. 1.0 µs is sufficient for all intended applications of this IC.

19.

If a slightly higher gate voltage is required, larger bootstrap capacitors are required. At high duty cycles, the bootstrap voltage may not

recover completely, leading to a higher output on-resistance. This effect can be minimized by using low ESR capacitors for the bootstrap

and the VLS capacitors.

20.

A small internal charge pump will supply up to 30

μA nominal to compensate for leakage on the High Side FET gate output and maintain

voltages after bootstrap events. It is not intended for external components to be connected to the High Side FET gate, but small amounts

of additional leakage can be accommodated. See Figures 11 through 14 for typical load margins.

Table 3. Static Electrical Characteristics (continued)

Characteristics noted under conditions 8.0 V

≤ VPWR = VSUP ≤ 40 V, -40°C ≤ TA ≤ 135°C, unless otherwise noted. Typical

values noted reflect the approximate parameter means at TA = 25°C under nominal conditions, unless otherwise noted.

Characteristic

Symbol

Min

Typ

Max

Unit

33937 Datasheet(PDF) 9 Page - Freescale Semiconductor, Inc

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