SAF7115 datasheet(13/35 Pages) NXP

13 / 35 page

SAF7115_1

Product data sheet

Rev. 01 — 15 October 2008

13 of 35

NXP Semiconductors

SAF7115

Multistandard video decoder

Limiting values

[1]

Condition for maximum voltage at digital inputs or I/O pins: 3.0 V < VDDD < 3.6 V.

[2]

Class 2 according to

EIA/JESD22-114.

[3]

Class C3B according to

AEC-Q100-011.

Thermal characteristics

[1]

The overall Rth(j-a) value can vary depending on the board layout. To minimize the effective Rth(j-a) all power

and ground pins must be connected to the power and ground layers directly and use maximum areas for

power and ground planes in the application PCB.

In order to meet the speciﬁed Rth(j-a) value the exposed die pad of the package has to be soldered directly

to the ground layer of the application PCB.

[2]

The overall Rth(j-a) value can vary depending on the board layout. To minimize the effective Rth(j-a) all power

and ground pins must be connected to the power and ground layers directly and use maximum areas for

power and ground planes in the application PCB.

The Rth(j-a) value is calculated for a 4 layer PCB (100 × 100 mm2) with at least 50 plated through-hole-vias

at the center of the package (large ground area). This calculation assumes 80 % coverage for power and

ground metal layers and a natural convection ﬂow at top and bottom sides of the PCB.

Maximum ball temperature then is 110

°C, assuming ambient temperature Tamb(max) = 85 °C.

Table 5.

Limiting values

In accordance with the Absolute Maximum Rating System (IEC 60134).

All ground pins connected together and grounded (0 V); all supply pins connected together.

Symbol

Parameter

Conditions

Min

Max

Unit

VDDA0

analog supply voltage 0

for CGC1 and CGC2

−0.5

+4.6

VDDA1

analog supply voltage 1

for analog inputs AI1x

−0.5

+4.6

VDDA2

analog supply voltage 2

for analog inputs AI2x

−0.5

+4.6

VDDA(XTAL)

crystal analog supply voltage

−0.5

+4.6

VDDD(CORE)

core digital supply voltage

−0.5

+4.6

VDDD(IO)

I/O digital supply voltage

−0.5

+4.6

VI(a)

analog input voltage

−0.5

+4.6

input voltage

at pins XTALI, SDA and SCL

−0.5

VDDx + 0.5 V

VI(D)

digital input voltage

outputs in 3-state

−0.5

+4.6

[1]

−0.5

+5.5

∆VSS

ground supply voltage

difference

100

Tstg

storage temperature

−65

+150

°C

Tamb

ambient temperature

−40

+85

°C

Vesd

electrostatic discharge

voltage

human body model, all pins

[2] -

±2000

charged device model, corner pins

[3] -

±750

charged device model, all other pins

[3] -

±500

Table 6.

Thermal characteristics

Symbol

Parameter

Conditions

Typ

Unit

Rth(j-a)

thermal resistance from junction to ambient in free air

SAF7115ET

[1] 23

K/W

SAF7115HW

[2] 35

K/W

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