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SAF7115 Datasheet(PDF) 14 Page - NXP Semiconductors |
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SAF7115 Datasheet(HTML) 14 Page - NXP Semiconductors |
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14 / 35 page ![]() SAF7115_1 © NXP B.V. 2008. All rights reserved. Product data sheet Rev. 01 — 15 October 2008 14 of 35 NXP Semiconductors SAF7115 Multistandard video decoder 9. Characteristics Table 7. Characteristics VDDD = 3.0 V to 3.6 V; VDDA = 3.1 V to 3.5 V; Tamb =25 °C; timings and levels refer to drawings and conditions illustrated in Figure 3 and Figure 4; unless otherwise specified. Symbol Parameter Conditions Min Typ Max Unit Supplies VDDA0 analog supply voltage 0 for CGC1 and CGC2 3.1 3.3 3.5 V VDDA1 analog supply voltage 1 for analog inputs AI1x 3.1 3.3 3.5 V VDDA2 analog supply voltage 2 for analog inputs AI2x 3.1 3.3 3.5 V VDDA(XTAL) crystal analog supply voltage 3.1 3.3 3.5 V VDDD(CORE) core digital supply voltage 3.0 3.3 3.6 V VDDD(IO) I/O digital supply voltage 3.0 3.3 3.6 V IDDA analog supply current VDDAx = 3.3 V; bits AOSL1 and AOSL0 = 0b [1] CVBS mode - 81 - mA Y/C mode - 142 - mA IDDD digital supply current X-port 3-state; 8-bit I-port out - 108 - mA P power dissipation digital part; open pin AOUT - 356 - mW analog part; VDDAx = 3.3 V CVBS mode - 267 - mW Y/C mode - 468 - mW analog and digital parts CVBS mode - 623 - mW Y/C mode - 825 - mW power-down mode [2] -7 - mW power-save mode [3] - 115 - mW Analog part Vi(p-p) peak-to-peak input voltage for normal video levels 1 V (p-p), −3dB termination 18 Ω to 56 Ω and AC coupling required; coupling capacitor is 47 nF - 0.7 - V ICL clamping current VI =1VDC - ±8- µA |Zi| input impedance clamping current off 200 - - k Ω Ci input capacitance - - 10 pF αcs channel separation fi < 5 MHz - - −50 dB 9-bit analog-to-digital converters B bandwidth at −3 dB - 7 - MHz ϕdif differential phase amplifier plus anti-alias filter bypassed - 2 - deg |
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