CCDC

Parallel

Imager

Input

H3A

IPIPEIF

IPIPE

Buffer

Logic

DDR2

EMIF

VPFE

HSYNCCycle

PCLK

HD

Advisory 1.1.1 — H3A data may get corrupted

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Advisory 1.1.1

H3A data may get corrupted

Revision(s) Affected

1.1

Details

This problem affects H3A auto white balance, auto exposure, and auto focus when the

image sensor data is large (i.e. greater than approximately 10 mega pixels) and the data

path is from imager to CCDC to H3A .

When the H3A module receives more than 4096 pixel clock cycles between consecutive

HD rising edges, the H3A internal line buffer may become corrupt. The internal line

buffer address is reset to zero at HD rising edge, is incremented every pixel clock cycle,

and wraps back to address zero after 4096 pixel clocks. H3A calculations may not be

correct when the line buffer is corrupt.

12

TMS320DM335 Digital Media System-on-Chip (DMSoC)

SPRZ287A – July 2008 – Revised October 2008

Silicon Revision 1.1

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