Advisory 1.1.3 — SPI: Receive Overrun Interrupt and Bit Error Can be Lost

www.ti.com

Advisory 1.1.3

SPI: Receive Overrun Interrupt and Bit Error Can be Lost

Revision(s) Affected:

1.1

Details:

Receive Overrun Interrupt (RXOVINT) and Bit Error interrupt (BITERRINT) can be lost if:

Reading of the SPIFLG register coincides with the setting of these interrupt flag bits.

Reading of the upper 16 bits of SPIBUF register coincides with the setting of these

interrupt bits.

Workaround:

Use the interrupt instead of the polling method to check the status of these interrupts.

Access only the lower 16 bits of the SPIBUF register to read received data.

If the polling method must be used, group the error interrupts into one Level (i.e., Level0)

and the RX complete interrupt into the other Level (i.e., Level1). Use the SPIINTVECT0

and SPIINTVECT1 registers to find out the interrupt status first and then only read the

SPIFLG register to decode the source of the error interrupts.

Advisory 1.1.4

SPI: RXINTFLG Bit in SPIFLG Register May Not Get Cleared

Revision(s) Affected:

1.1

Details:

The RXINTFLG bit in the SPIFLG register may not get cleared by reading the SPIBUF

register when the read coincides with the setting of the RXINTFLG bit due to new data

arrival.

Workaround:

When the above condition occurs, the system is at the verge of receive overrun.

Therefore, either optimize the SPIBUF servicing routine to avoid receive overrun or use

the EDMA3 to avoid the race condition from occurring.

Advisory 1.1.5

SPI: A Write to SPIFLG Receiver Overrun Bit Does Not Clear the Flag

Revision(s) Affected:

1.1

Details:

A write to the SPIFLG receiver overrun (SPIFLG.OVRNINTFLG) bit does not clear the

flag if the write coincides with the setting of the receive interrupt flag

(SPIFLG.RXINTFLG).

Workaround:

Write to the SPIFLG.OVRNINTFLG bit, then read back the value of the flag. If the flag

did not clear, then write to clear the flag again.

16

TMS320DM335 Digital Media System-on-Chip (DMSoC)

SPRZ287A – July 2008 – Revised October 2008

Silicon Revision 1.1

Submit Documentation Feedback