Advisory 1.1.11 — RBL Code ECC Limitation

www.ti.com

Advisory 1.1.11

RBL Code ECC Limitation

Revision(s) Affected

1.1

Details

During NAND boot, the ROM Bootloader (RBL) does not implement error correction and

detection (ECC). In particular, during NAND boot, the RBL will neither detect nor correct

bit errors while loading the user boot loader (UBL).

Once the UBL is loaded, the UBL can implement error correction and detection. For

more information on the NAND boot process, see the “NAND Boot Mode” section in the

TMS320DM335 Digital Media System-on-Chip ARM Subsystem Reference Guide

(literature number SPRUFX7).

This is a limitation in the RBL. This is not a limitation in the ECC hardware that is a

feature of the Asynchronous EMIF(AEMIF) peripheral. Therefore any software outside of

the RBL, such as the UBL and NAND driver, can use the ECC hardware to implement

NAND error correction and detection.

Workaround(s)

The impact of this problem is limited by the incidence of read errors of the NAND device.

In very rare situations, a bit error could occur in the UBL transfer. The impact can be

limited by choosing a NAND device with lower incidence of read errors. SLC NAND is

recommended. SLC NAND typically has a lower incidence of read errors compared to

MLC NAND. The impact can also be limited by minimizing the size of the UBL. Note: the

maximum UBL size is 30Kbytes.

This limitation has no impact on any of the other boot modes: MMC/SD boot mode,

AEMIF/OneNAND boot mode, UART boot mode. This limitation also has no impact on

managed NAND devices.

22

TMS320DM335 Digital Media System-on-Chip (DMSoC)

SPRZ287A – July 2008 – Revised October 2008

Silicon Revision 1.1

Submit Documentation Feedback