TMS320UC5402 datasheet(48/63 Pages) TI

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TMS320UC5402

FIXED-POINT DIGITAL SIGNAL PROCESSOR

SPRS096A – APRIL 1999 – REVISED DECEMBER 1999

POST OFFICE BOX 1443

• HOUSTON, TEXAS 77251–1443

instruction acquisition (IAQ), interrupt acknowledge (IACK), external flag (XF), and TOUT timings

switching characteristics over recommended operating conditions for IAQ and IACK

[H = 0.5 tc(CO)] (see Figure 24)

PARAMETER

MIN

MAX

UNIT

td(CLKL-IAQL)

Delay time, CLKOUT low to IAQ low

td(CLKL-IAQH)

Delay time, CLKOUT low to IAQ high

td(A)IAQ

Delay time, address valid to IAQ low

td(CLKL-IACKL)

Delay time, CLKOUT low to IACK low

td(CLKL-IACKH)

Delay time , CLKOUT low to IACK high

td(A)IACK

Delay time, address valid to IACK low

th(A)IAQ

Hold time, IAQ high after address invalid

–1

th(A)IACK

Hold time, IACK high after address invalid

–1

tw(IAQL)

Pulse duration, IAQ low

2H–1

tw(IACKL)

Pulse duration, IACK low

2H–1

MSTRB

IACK

IAQ

A[19:0]

CLKOUT

td(A)IACK

td(A)IAQ

tw(IACKL)

th(A)IACK

td(CLKL-IACKL)

tw(IAQL)

th(A)IAQ

td(CLKL-IAQL)

td(CLKL-IACKH)

td(CLKL-IAQH)

Figure 24. IAQ and IACK Timings

TMS320UC5402 Datasheet(PDF) 48 Page - Texas Instruments

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