 |
Electronic Components Datasheet Search |
|
|
Electronic Components Datasheet Search |
|
XIO2001 Datasheet(PDF) 85 Page - Texas Instruments |
|
|
|
|||||||||||||||||||||||||||||
XIO2001 Datasheet(HTML) 85 Page - Texas Instruments |
|
|
85 / 131 page  4.68 Clock Run Status Register XIO2001 PCI Express™ to PCI Bus Translation Bridge www.ti.com SCPS212B – MAY 2009 – REVISED JULY 2009 The clock run status register indicates the state of the PCI clock-run features in the bridge. See Table 4-42 for a complete description of the register contents. PCI register offset: DAh Register type: Read-only Default value: 00h BIT NUMBER 7 6 5 4 3 2 1 0 RESET STATE 0 0 0 0 0 0 0 0 Table 4-42. Clock Run Status Register Description BIT FIELD NAME ACCESS DESCRIPTION 7:1 RSVD R Reserved. Returns 000 0000b when read. 0(1) Secondary clock status. This bit indicates the status of the PCI bus secondary clock outputs. SEC_CLK_STATUS RU 0 = Secondary clock running 1 = Secondary clock stopped (1) These bits are reset by a PCI Express reset (PERST), a GRST, or the internally-generated power-on reset. Submit Documentation Feedback Classic PCI Configuration Space 85 |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
English ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
