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XIO2001 Datasheet(PDF) 26 Page - Texas Instruments |
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XIO2001 Datasheet(HTML) 26 Page - Texas Instruments |
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26 / 131 page  XIO2001 PCI Express™ to PCI Bus Translation Bridge SCPS212B – MAY 2009 – REVISED JULY 2009 www.ti.com Table 2-10. Miscellaneous Terminals (continued) ZGU ZAJ I/O CELL CLAMP EXTERNAL SIGNAL DESCRIPTION BALL # BALL # TYPE TYPE RAIL PARTS GPIO0 // N09 N09 I/O LV VDD_33 General-purpose I/O 0/clock run. This terminal CLKRUN CMOS functions as a GPIO controlled by bit 0 (GPIO0_DIR) in the GPIO control register (see Section 4.59) or the clock run terminal. This terminal is used as clock run input when the bridge is placed in clock run mode. Optional pullup Note: In clock run mode, an external pullup resistor resistor is required to prevent the CLKRUN signal from floating. Note: This terminal has an internal active pullup resistor. The pullup is only active when reset is asserted or when the GPIO is configured as an input. GPIO1 // M09 M09 I/O LV VDD_33 General-purpose I/O 1/power override. This PWR_OVR CMOS terminal functions as a GPIO controlled by bit 1 D (GPIO1_DIR) in the GPIO control register (see Section 4.59) or the power override output terminal. GPIO1 becomes PWR_OVRD when bits 22:20 (POWER_OVRD) in the general – control register are set to 001b or 011b (see Section 4.65). Note: This terminal has an internal active pullup resistor. The pullup is only active when reset is asserted or when the GPIO is configured as an input. GPIO2 N10 N10 I/O LV VDD_33 General-purpose I/O 2. This terminal functions CMOS as a GPIO controlled by bit 2 (GPIO2_DIR) in the GPIO control register (see Section 4.59). – Note: This terminal has an internal active pullup resistor. The pullup is only active when reset is asserted or when the GPIO is configured as an input. GPIO3 // N11 L08 I/O LV VDD_33 GPIO3 or serial-bus data. This terminal SDA CMOS functions as serial-bus data if a pullup resistor is detected on SCL or when the SBDETECT bit is set in the Serial Bus Control and Status Optional Register (see Section 4.58). If no pullup is pullup detected then this terminal functions as resistor GPIO3. Note: In serial-bus mode, an external pullup resistor is required to prevent the SDA signal from floating. GPIO4 // M10 M10 I/O LV VDD_33 GPIO4 or serial-bus clock. This terminal SCL CMOS functions as serial-bus clock if a pullup resistor is detected on SCL or when the SBDETECT bit is set in the Serial Bus Control and Status Register (see Section 4.58). If no pullup is detected then this terminal functions as Optional GPIO4. pullup Note: In serial-bus mode, an external pullup resistor resistor is required to prevent the SCL signal from floating. Note: This terminal has an internal active pullup resistor. The pullup is only active when reset is asserted or when the GPIO is configured as an input. Overview 26 Submit Documentation Feedback |
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