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AD5293 Datasheet(PDF) 15 Page - Analog Devices

Part # AD5293
Description  Single-Channel, 1024-Position, 1% R-Tolerance Digital Potentiometer
PDF  20 Pages
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

AD5293 Datasheet(HTML) 15 Page - Analog Devices

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AD5293
Rev. 0 | Page 15 of 20
RESET
A low-to-high transition of the hardware RESET pin loads the
RDAC register with midscale. The AD5293 can also be reset
through software by executing Command 3 (see
). The
control register is restored with default settings (see
).
Table 8
Table 10
RESISTOR PERFORMANCE MODE
This mode activates a new, patented 1% end-to-end resistor
tolerance that ensures a ±1% resistor tolerance on each code,
that is, code = half scale, RWB = 10 kΩ ± 100 Ω. See Table 2 to
verify which codes achieve ±1% resistor tolerance. The resistor
performance mode is activated by programming Bit C2 of the
control register (see Table 9 and Table 10). The typical settling
time is shown in Figure 23.
DAISY-CHAIN OPERATION
The serial data output pin (SDO) serves two purposes. It can be
used to read the contents of the wiper setting, using Command 2
(see Table 8), or it can be used for daisy-chaining multiple devices.
The remaining instructions are valid for daisy-chaining multiple
devices in simultaneous operations. Daisy chaining minimizes
the number of port pins required from the controlling IC.
The SDO pin contains an open-drain N-channel FET that requires
a pull-up resistor, if this function is used. As shown in Figure 32,
the SDO pin of one package must be tied to the DIN pin of the
next package. Users may need to increase the clock period because
the pull-up resistor and the capacitive loading at the SDO/DIN
interface may require an additional time delay between subsequent
devices.
When two AD5293 devices are daisy-chained, 32 bits of data are
required. The first 16 bits go to U2, and the second 16 bits go to U1.
The SYNC pin should be held low until all 32 bits are clocked into
their respective serial registers. The SYNC pin is then pulled high
to complete the operation.
DIN
SDO
SCLK
SCLK
RP
2.2kΩ
DIN
SDO
U1
U2
AD5293
AD5293
SYNC
VLOGIC
MICRO-
CONTROLLER
SCLK
SS
MOSI
SYNC
Figure 32. Daisy-Chain Configuration Using SDO
Table 8. Command Operation Truth Table
Command
Command Bits[B13:B10]
Data Bits[B9:B0]1
Operation
C3
C2
C1
C0
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
0
0
0
0
0
X
X
X
X
X
X
X
X
X
X
NOP command. Do nothing.
1
0
0
0
1
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
Write contents of serial register data
to RDAC.
2
0
0
1
0
X
X
X
X
X
X
X
X
X
X
Read RDAC wiper setting from SDO
output in the next frame.
3
0
1
0
0
X
X
X
X
X
X
X
X
X
X
Reset. Refresh RDAC with midscale code.
4
0
1
1
0
X
X
X
X
X
X
X
D2
D1
X
Write contents of serial register data to
control register.
5
0
1
1
1
X
X
X
X
X
X
X
X
X
X
Read control register from SDO output
in the next frame.
6
1
0
0
0
X
X
X
X
X
X
X
X
X
D0
Software power-down.
D0 = 0 (normal mode).
D0 = 1 (device placed in shutdown
mode).
1 X = don’t care.
Table 9. Control Register Bit Map
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
X1
X1
X1
X1
X1
X1
X1
C2
C1
X1
1 X = don’t care.
Table 10. Control Register Bit Descriptions
Register Name
Bit Name
Description
Control
C2
Calibration enable.
0 = Resistor Performance Mode (default).
1 = Normal Mode.
C1
RDAC register write protect.
0 = locks the wiper position through the digital interface (default).
1 = allows update of wiper position through digital interface.



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