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SN8P2613 Datasheet(PDF) 22 Page - SONiX Technology Company |
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SN8P2613 Datasheet(HTML) 22 Page - SONiX Technology Company |
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22 / 102 page ![]() SN8P2610 Series 8-Bit Micro-Controller SONiX TECHNOLOGY CO., LTD Page 22 Version 1.3 2.1.2 CODE OPTION TABLE Code Option Content Function Description IHRC_16M High speed internal 16MHz RC. XIN/XOUT become to P1.6/P1.4 bi-direction I/O pins. RC Low cost RC for external high clock oscillator and XOUT becomes to P1.4 bit-direction I/O pin. 12M X’tal High speed crystal /resonator (e.g. 12MHz) for external high clock oscillator. High_Clk 4M X’tal Standard crystal /resonator (e.g. 4M) for external high clock oscillator. Always_On Watchdog timer is always on enable even in power down and green mode. Enable Enable watchdog timer. Watchdog timer stops in power down mode and green mode. Watch_Dog Disable Disable Watchdog function. Fhosc/1 Instruction cycle is oscillator clock. Notice: In Fosc/1, Noise Filter must be disabled. Fhosc/2 Instruction cycle is 2 oscillator clocks. Notice: In Fosc/2, Noise Filter must be disabled. Fhosc/4 Instruction cycle is 4 oscillator clocks. Fhosc/8 Instruction cycle is 8 oscillator clocks. Fcpu Fhosc/16 Instruction cycle is 16 oscillator clocks. Reset Enable External reset pin. Reset_Pin P15 Enable P1.5 input only without pull-up resister. Enable Enable ROM code Security function. Security Disable Disable ROM code Security function. Enable Enable Noise Filter and the Fcpu is Fosc/4~Fosc/16. Noise_Filter Disable Disable Noise Filter and the Fcpu is Fosc/1~Fosc/16. LVD_L LVD will reset chip if VDD is below 2.0V LVD_M LVD will reset chip if VDD is below 2.0V Enable LVD24 bit of PFLAG register for 2.4V low voltage indicator. LVD LVD_H LVD will reset chip if VDD is below 2.4V Enable LVD36 bit of PFLAG register for 3.6V low voltage indicator. Note: 1. In high noisy environment, enable “Noise Filter” and set Watch_Dog as “Always_On” is strongly recommended. Enable “Noise_Filter” will limit the Fcpu = Fosc/4 ~ Fosc/128. 2. If users define watchdog as “Always_On”, assembler will Enable “Watch_Dog” automatically. 3. Fcpu code option is only available for High Clock. Fcpu of slow mode is Fosc/4 (the Fosc is internal low clock). |
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