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MAX17021 Datasheet(PDF) 2 Page - Maxim Integrated Products |
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MAX17021 Datasheet(HTML) 2 Page - Maxim Integrated Products |
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2 / 48 page ![]() Dual-Phase, Quick-PWM Controllers for IMVP-6+/IMVP-6.5 CPU Core Power Supplies 2 _______________________________________________________________________________________ ABSOLUTE MAXIMUM RATINGS ELECTRICAL CHARACTERISTICS (Circuit of Figure 1, VIN = 10V, VCC = VDD = VSHDN = VPGDIN = VPSI = VILIM = 5V, V3P3 = 3.3V, DPRSLPVR = GNDS = GND, VCSP1 = VCSN1 = VCSP2 = VCSN1 = 1.0000V, FB = FBAC, RFBAC = 3.57kΩ from FBAC to CSN1, D6–D0 = [0101000]; MAX17082/MAX17482: VSLOW = 5V; MAX17021: DPRSTP = GND; TA = 0°C to +85°C, unless otherwise noted. Typical values are at TA = +25°C.) Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. VCC, VDD, V3P3 to GND ...........................................-0.3V to +6V D0–D6 to GND..........................................................-0.3V to +6V PGDIN, DPRSLPVR, PSI to GND..............................-0.3V to +6V DPRSTP (MAX17021) to GND ..................................-0.3V to +6V SLOW (MAX17082/MAX17482) to GND...................-0.3V to +6V CSP1, CSP2, CSN1, CSN2 to GND..........................-0.3V to +6V THRM, ILIM, PHASEGD to GND...............................-0.3V to +6V PWRGD, VRHOT to GND .........................................-0.3V to +6V CLKEN to GND ...........................................-0.3V to V3P3 + 0.3V FB, FBAC to GND .........................................-0.3V to VCC + 0.3V TIME, CCI to GND.........................................-0.3V to VCC + 0.3V IMON to GND (MAX17021/MAX17082) ........-0.3V to VCC + 0.3V GNDS to GND .......................................................-0.3V to +0.3V SHDN to GND (Note 1)...........................................-0.3V to +16V TON to GND ...........................................................-0.3V to +30V DL1, DL2 to GND ..........................................-0.3V to VDD + 0.3V BST1, BST2 to GND ...............................................-0.3V to +36V BST1, BST2 to VDD.................................................-0.3V to +30V LX1 to BST1..............................................................-6V to +0.3V LX2 to BST2..............................................................-6V to +0.3V DH1 to LX1 ..............................................(-0.3V to VBST1) + 0.3V DH2 to LX2 ..............................................(-0.3V to VBST2) + 0.3V Continuous Power Dissipation 40-Pin 5mm x 5mm TQFN Up to +70°C.....................1778mW (derate above +70°C) ............................................22.2mW/°C Operating Temperature Range .........................-40°C to +105°C Junction Temperature ......................................................+150°C Storage Temperature Range .............................-65°C to +165°C Lead Temperature (soldering, 10s) .................................+300°C PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS PWM CONTROLLER VCC, VDD 4.5 5.5 Input-Voltage Range V3P3 3.0 3.6 V DAC codes from 0.8125V to 1.5000V -0.5 +0.5 % DAC codes from 0.3750V to 0.8000V -7 +7 DC Output-Voltage Accuracy VOUT Measured at FB with respect to GNDS; includes load- regulation error (Note 2) DAC codes from 0 to 0.3625V -20 +20 mV MAX17021 IMVP-6+ 1.194 1.200 1.206 Boot Voltage VBOOT MAX17082/MAX17482 IMVP-6.5 1.094 1.100 1.106 V Line Regulation Error VCC = 4.5V to 5.5V, VIN = 4.5V to 26V 0.1 % FB Input Bias Current TA = +25°C -0.1 +0.1 μA GNDS Input Range -200 +200 mV GNDS Gain AGNDS VOUT/ VGNDS 0.97 1.00 1.03 V/V GNDS Input Bias Current IGNDS TA = +25°C -0.5 +0.5 μA TIME Regulation Voltage VTIME RTIME = 71.5k 1.985 2.000 2.015 V Note 1: SHDN might be forced to 12V for the purpose of debugging prototype boards using the no-fault test mode, which disables fault protection and overlapping operation. |
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