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MAX17021 Datasheet(PDF) 44 Page - Maxim Integrated Products |
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MAX17021 Datasheet(HTML) 44 Page - Maxim Integrated Products |
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44 / 48 page ![]() For most applications, nontantalum chemistries (ceram- ic, aluminum, or OS-CON) are preferred due to their resistance to inrush surge currents typical of systems with a mechanical switch or connector in series with the input. If the Quick-PWM controller is operated as the second stage of a two-stage power-conversion system, tantalum input capacitors are acceptable. In either con- figuration, choose an input capacitor that exhibits less than +10°C temperature rise at the RMS input current for optimal circuit longevity. Power-MOSFET Selection Most of the following MOSFET guidelines focus on the challenge of obtaining high load-current capability when using high-voltage (> 20V) AC adapters. Low- current applications usually require less attention. The high-side MOSFET (NH) must be able to dissipate the resistive losses plus the switching losses at both VIN(MIN) and VIN(MAX). Calculate both these sums. Ideally, the losses at VIN(MIN) should be approximately equal to losses at VIN(MAX), with lower losses in between. If the losses at VIN(MIN) are significantly high- er than the losses at VIN(MAX), consider increasing the size of NH (reducing RDS(ON) but with higher CGATE). Conversely, if the losses at VIN(MAX) are significantly higher than the losses at VIN(MIN), consider reducing the size of NH (increasing RDS(ON) to lower CGATE). If VIN does not vary over a wide range, the minimum power dissipation occurs where the resistive losses equal the switching losses. Choose a low-side MOSFET that has the lowest possible on-resistance (RDS(ON)), comes in a moderate-sized package (i.e., one or two 8-pin SOs, DPAK, or D2PAK), and is reasonably priced. Make sure that the DL_ gate driver can supply sufficient current to support the gate charge and the current injected into the parasitic gate- to-drain capacitor caused by the high-side MOSFET turning on; otherwise, cross-conduction problems might occur (see the MOSFET Gate Drivers section). MOSFET Power Dissipation Worst-case conduction losses occur at the duty factor extremes. For the high-side MOSFET (NH), the worst- case power dissipation due to resistance occurs at the minimum input voltage: where ηTOTAL is the total number of phases. Generally, a small high-side MOSFET is desired to reduce switching losses at high input voltages. However, the RDS(ON) required to stay within package power dissipation often limits how small the MOSFET can be. Again, the optimum occurs when the switching losses equal the conduction (RDS(ON)) losses. High- side switching losses do not usually become an issue until the input is greater than approximately 15V. Calculating the power dissipation in high-side MOSFET (NH) due to switching losses is difficult since it must allow for difficult quantifying factors that influence the turn-on and turn-off times. These factors include the internal gate resistance, gate charge, threshold volt- age, source inductance, and PCB layout characteris- tics. The following switching-loss calculation provides only a very rough estimate and is no substitute for breadboard evaluation, preferably including verification using a thermocouple mounted on NH: where COSS is the NH MOSFET’s output capacitance, QG(SW) is the charge needed to turn on the NH MOSFET, and IGATE is the peak gate-drive source/sink current (2.2A typ). Switching losses in the high-side MOSFET can become an insidious heat problem when maximum AC adapter voltages are applied due to the squared term in the C x VIN2 x ƒSW switching-loss equation. If the high-side MOSFET chosen for adequate RDS(ON) at low-battery voltages becomes extraordinarily hot when biased from VIN(MAX), consider choosing another MOSFET with lower parasitic capacitance. For the low-side MOSFET (NL), the worst-case power dissipation always occurs at maximum input voltage: The worst case for MOSFET power dissipation occurs under heavy overloads that are greater than ILOAD(MAX) but are not quite high enough to exceed PD N sistive V V L OUT IN MAX (Re ) () = ⎛ ⎝ ⎜ ⎞ ⎠ ⎟ ⎡ ⎣ ⎢1- ⎢⎢ ⎤ ⎦ ⎥ ⎥ ⎛ ⎝⎜ ⎞ ⎠⎟ I R LOAD TOTAL DS ON η 2 () PD N Switching VI f H IN MAX LOAD SW TOTAL () () = ⎛ η ⎝⎝⎜ ⎞ ⎠⎟ ⎛ ⎝⎜ ⎞ ⎠⎟ + Q I CV f GSW GATE OSS IN SW () 2 2 PD N sistive V V I H OUT IN LOAD TOTA (Re ) = ⎛ ⎝⎜ ⎞ ⎠⎟ η L L DS ON R ⎛ ⎝⎜ ⎞ ⎠⎟ 2 () Dual-Phase, Quick-PWM Controllers for IMVP-6+/IMVP-6.5 CPU Core Power Supplies 44 ______________________________________________________________________________________ |
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