AS3525 datasheet(146/194 Pages) AMSCO

146 / 194 page

AS3525-A/-B C22O22

Data Sheet, Confidential

www.austriamicrosystems.com

Revision 1.13

146

- 194

Table 132 ADC_R Register

Name

Base

Default

ADC_R

I2C audio master

0x00

Right ADC input Registers

Offset: 0x10

This register is reset when the block is disabled in AudioSet1 register (0x14) or at a

DVDD-POR. The register cannot be written when the block is disabled.

Bit

Bit Name

Default

Access

Bit Description

7:6

ADCmux

R/W

00: Stereo Microphone

01: Line_IN1

10: Line_IN2

11: Audio SUM

4:0

ADR_VOL

00000

R/W

volume settings for right ADC input,

adjustable in 32 steps @ 1.5dB

11111: 12 dB gain

11110: 10.5 dB gain

00001: -33 dB gain

00000: -34.5 dB gain

Table 133 ADC_L Register

Name

Base

Default

ADC_L

I2C audio master

0x00

Left ADC input Registers

Offset: 0x11

This register is reset when the block is disabled in AudioSet1 register (0x14) or at a

DVDD-POR. The register cannot be written when the block is disabled.

Bit

Bit Name

Default

Access

Bit Description

AD_FS_4

R/W

Divider selection for ADC sampling clock

0: ADC sample clock is I2S LRCK / 2

1: ADC sample clock is I2S LRCK / 4

ADC_Mute_off

R/W

0: ADC output is set to mute

1: normal operation

n/a

4:0

ADL_VOL

00000

R/W

volume settings for left ADC input,

adjustable in 32 steps @ 1.5dB

11111: 12 dB gain

11110: 10.5 dB gain

00001: -33 dB gain

00000: -34.5 dB gain

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