ADF4158

Rev. 0 | Page 19 of 36

DB31

RESERVED

CONTROL

BITS

DB30 DB29 DB28 DB27 DB26 DB25 DB24 DB23 DB22 DB21 DB20 DB19 DB18 DB17 DB16 DB15 DB14 DB13 DB12 DB11 DB10 DB9

DB8

DB7

DB6

DB5

DB4

DB3

DB2

DB1

DB0

00

000

00

00

00

000

00

NS1

U12

00

RM2 RM1

PE1

FE1

U11

U10

U9

U8

U7

C3(0) C2(1) C1(1)

U9

POWER-DOWN

0DISABLED

1ENABLED

U11

LDP

024 PFD CYCLES

140 PFD CYCLES

NS1

N SEL

0

N WORD LOAD ON SDCLK

1

N WORD LOAD DELAYED 4 CYCLES

RM2

RAMP MODE

0

CONTINUOUS SAWTOOTH

1

RM1

0

1

SINGLE TRIANGULAR

1

1

SINGLE SAWTOOTH

1

1

CONTINUOUS TRIANGULAR

U7

COUNTER

RESET

0DISABLED

1ENABLED

U10

PD POLARITY

0NEGATIVE

1POSITIVE

U8

CP

THREE-STATE

0

DISABLED

1ENABLED

FE1

FSK ENABLE

0

DISABLED

1

ENABLED

U12

Σ-Δ RESET

0

ENABLED

1

DISABLED

PE1

PSK ENABLE

0DISABLED

1

ENABLED

Figure 25. Function Register (R3) Map