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ADF4158

Rev. 0 | Page 29 of 36

Table 7. Interrupt Modes

The following example explains how to set up and use this

function.

Mode

Action

DB[27:26] = 00

Interrupt is off

DB[27:26] = 01

Interrupt on TXDATA, sweep continues

DB[27:26] = 11

Interrupt on TXDATA, sweep stops

Example

fOUT = 5790 MHz

fDEV = 100 kHz

When an interrupt takes place, the data consisting of the INT

and FRAC values can be read back via MUXOUT. The data is

made up of 37 bits, 12 of which represent the INT value and 25

the FRAC value.

Number of steps = 50

Duration of a single step = 10 μs

Ramp mode must be either triangular (Register R3, DB[11:10]

= 01) or single triangular (Register R3, DB[11:10] = 11).

The idea of frequency readback is shown in Figure 40.

In the first case, the generated frequency range is calculated as

follows:

TIME

TIME OF INTERRUPT

FREQUENCY AT WHICH INTERRUPT TOOK PLACE

INTERRUPT SIGNAL

LOGIC HIGH

LOGIC LOW

1. SWEEP CONTINUES MODE

2. SWEEP STOPS MODE

Δf = fDEV × (Number of Steps + 2) × (Number of Steps + 1)/2

= 132.6 MHz

In the second case, the generated frequency range is calculated

as follows:

Δf = fDEV × (Number of Steps + 1) × Number of Steps/2

= 127.5 MHz

The timer is set in the same way as for its linear ramps

described in the Waveform Generation section.

Activation of the parabolic ramp is achieved by setting Bit DB28

in Register R5 to 1.

Next the counter reset (DB3 in Register R3) should be set first

to 1 and then to 0.

Eventually, the ramp must be activated as described in the

Activating the Ramp section.

Figure 40. Interrupt and Frequency Readback

Interrupt Modes and Frequency Readback

Note that DB[22:21] in Register R4 should be set to 2 and

DB[30:27] in Register R0 (MUXOUT control) should be

set to 15 (1111).

Interrupt modes are triggered from the rising edge of TXDATA.

Depending on the settings of DB[27:26] in Register R5, the

modes in Table 7 are activated.

The mechanism of how single bits are read back is shown in

Figure 41.

DATA CLOCKED OUT ON POSITIVE EDGE OF CLK AND READ ON NEGATIVE EDGE OF CLK

READBACK WORD (37 BITS)

0 0001 1100 1111 0110 0010 0011 1010 0111 1000 (HEX01CF623A78)

MSB

LSB

MUXOUT

CLK

12-BIT INT WORD

0000 1110 0111

0E7

231

25-BIT FRAC WORD

1 0110 0010 0011 1010 0111 1000

1623A78

23214712

RF =

fPFD × (231 + 23214712/225) = 1.7922963GHz = 1.846V VTUNE

TXDATA

Figure 41. Reading Back Single Bits to Determine the Output Frequency at the Moment of Interrupt

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