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HCS12 Datasheet(PDF) 27 Page - Freescale Semiconductor, Inc |
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HCS12 Datasheet(HTML) 27 Page - Freescale Semiconductor, Inc |
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27 / 452 page ![]() S12CPUV2 Reference Manual, Rev. 4.0 Freescale Semiconductor 27 operations. Shift and rotate instructions operate through the C bit to facilitate multiple-word shifts. 2.3 Data Types The CPU12 uses these types of data: • Bits • 5-bit signed integers • 8-bit signed and unsigned integers • 8-bit, 2-digit binary-coded decimal numbers • 9-bit signed integers • 16-bit signed and unsigned integers • 16-bit effective addresses • 32-bit signed and unsigned integers Negative integers are represented in two’s complement form. Five-bit and 9-bit signed integers are used only as offsets for indexed addressing modes. Sixteen-bit effective addresses are formed during addressing mode computations. Thirty-two-bit integer dividends are used by extended division instructions. Extended multiply and extended multiply-and-accumulate instructions produce 32-bit products. 2.4 Memory Organization The standard CPU12 address space is 64 Kbytes. Some M68HC12 devices support a paged memory expansion scheme that increases the standard space by means of predefined windows in address space. The CPU12 has special instructions that support use of expanded memory. Eight-bit values can be stored at any odd or even byte address in available memory. |
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