HCS12 datasheet(51/452 Pages) FREESCALE

51 / 452 page

S12CPUV2 Reference Manual, Rev. 4.0

Freescale Semiconductor

Subroutines in the normal 64-Kbyte address space are terminated with a

return-from-subroutine (RTS) instruction. RTS unstacks the return address,

then performs three program word fetches from that address to refill the

queue.

CALL is similar to JSR. MCUs with expanded memory treat 16 Kbytes of

addresses from $8000 to $BFFF as a memory window. An 8-bit PPAGE

executed, a return address is calculated, then it and the current PPAGE

value are stacked, and a new instruction-supplied value is written to

PPAGE. The subroutine address is calculated, then three program word

fetches are made from that address to refill the instruction queue.

The return-from-call (RTC) instruction is used to terminate subroutines in

expanded memory. RTC unstacks the PPAGE value and the return

address, then performs three program word fetches from that address to

refill the queue.

CALL and RTC execute correctly in the normal 64-Kbyte address space,

thus providing for portable code. However, since extra execution cycles are

required, routinely substituting CALL/RTC for JSR/RTS is not

recommended.

4.4.3 Branches

Branch instructions cause execution flow to change when specific

pre-conditions exist. The CPU12 instruction set includes:

• Short conditional branches

• Long conditional branches

• Bit-condition branches

Types and conditions of branch instructions are described in

5.19 Branch Instructions. All branch instructions affect the queue similarly,

but there are differences in overall cycle counts between the various types.

Loop primitive instructions are a special type of branch instruction used to

implement counter-based loops.

Branch instructions have two execution cases:

• The branch condition is satisfied, and a change of flow takes place.

• The branch condition is not satisfied, and no change of flow occurs.

HCS12 Datasheet(PDF) 51 Page - Freescale Semiconductor, Inc