HCS12 datasheet(35/452 Pages) FREESCALE

35 / 452 page

S12CPUV2 Reference Manual, Rev. 4.0

Freescale Semiconductor

This approach eliminates the differences between X and Y register use

while dramatically enhancing the indexed addressing capabilities.

Major advantages of the CPU12 indexed addressing scheme are:

• The stack pointer can be used as an index register in all indexed

operations.

• The program counter can be used as an index register in all but

autoincrement and autodecrement modes.

• A, B, or D accumulators can be used for accumulator offsets.

• Automatic pre- or post-increment or pre- or post-decrement by –8 to

• A choice of 5-, 9-, or 16-bit signed constant offsets

• Use of two new indexed-indirect modes:

–

Indexed-indirect mode with 16-bit offset

–

Indexed-indirect mode with accumulator D offset

Table 3-2 is a summary of indexed addressing mode capabilities and a

description of postbyte encoding. The postbyte is noted as xb in instruction

descriptions. Detailed descriptions of the indexed addressing mode

variations follow the table.

All indexed addressing modes use a 16-bit CPU register and additional

information to create an effective address. In most cases the effective

address specifies the memory location affected by the operation. In some

variations of indexed addressing, the effective address specifies the

location of a value that points to the memory location affected by the

operation.

HCS12 Datasheet(PDF) 35 Page - Freescale Semiconductor, Inc