HCS12 datasheet(85/452 Pages) FREESCALE

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S12CPUV2 Reference Manual, Rev. 4.0

Freescale Semiconductor

5.27 Stop and Wait Instructions

As shown in Table 5-27, two instructions put the CPU12 in an inactive state

that reduces power consumption.

The stop instruction (STOP) stacks a return address and the contents of

CPU registers and accumulators, then halts all system clocks.

The wait instruction (WAI) stacks a return address and the contents of CPU

registers and accumulators, then waits for an interrupt service request;

however, system clock signals continue to run.

Both STOP and WAI require that either an interrupt or a reset exception

occur before normal execution of instructions resumes. Although both

instructions require the same number of clock cycles to resume normal

program execution after an interrupt service request is made, restarting

after a STOP requires extra time for the oscillator to reach operating speed.

Table 5-27. Stop and Wait Instructions

Mnemonic

Function

Operation

STOP

Stop

SP – 2

⇒ SP; RTNH : RTNL ⇒ M(SP) : M(SP+1)

SP – 2

⇒ SP; YH : YL ⇒ M(SP) : M(SP+1)

SP – 2

⇒ SP; XH : XL ⇒ M(SP) : M(SP+1)

SP – 2

⇒ SP; B : A ⇒ M(SP) : M(SP+1)

SP – 1

⇒ SP; CCR ⇒ M(SP)

Stop CPU clocks

WAI

Wait for interrupt

SP – 2

⇒ SP; RTNH : RTNL ⇒ M(SP) : M(SP+1)

SP – 2

⇒ SP; YH : YL ⇒ M(SP) : M(SP+1)

SP – 2

⇒ SP; XH : XL ⇒ M(SP) : M(SP+1)

SP – 2

⇒ SP; B : A ⇒ M(SP) : M(SP+1)

SP – 1

⇒ SP; CCR ⇒ M(SP)

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