HCS12 datasheet(181/452 Pages) FREESCALE

181 / 452 page

Glossary

S12CPUV2 Reference Manual, Rev. 4.0

Freescale Semiconductor

181

Operation:

(M : M + 1) + [(B)

× ((M + 2 : M + 3) – (M : M + 1))] ⇒ D

Description:

ETBL linearly interpolates one of 256 result values that fall between each

pair of data entries in a lookup table stored in memory. Data entries in the

table represent the y values of endpoints of equally-spaced line segments.

Table entries and the interpolated result are 16-bit values. The result is

stored in the D accumulator.

Before executing ETBL, an index register points to the table entry

corresponding to the x value (X1 that is closest to, but less than or equal to,

the desired lookup point (XL, YL). This defines the left end of a line segment

and the right end is defined by the next data entry in the table. Prior to

execution, accumulator B holds a binary fraction (radix left of MSB)

representing the ratio of (XL–X1)

÷ (X2–X1).

The 16-bit unrounded result is calculated using the following expression:

D = Y1 + [(B)

× (Y2 – Y1)]

Where:

(B) = (XL – X1)

÷ (X2 – X1)

Y1 = 16-bit data entry pointed to by <effective address>

Y2 = 16-bit data entry pointed to by <effective address> + 2

The intermediate value [(B)

× (Y2 – Y1)] produces a 24-bit result with the

radix point between bits 7 and 8. Any indexed addressing mode, except

indirect modes or 9-bit and 16-bit offset modes, can be used to identify the

first data point (X1,Y1). The second data point is the next table entry.

1. C-bit was undefined in original M68HC12

ETBL

Extended Table Lookup and Interpolate

ETBL

CCR Details:

HIN

––––

∆∆

–

∆(1)

N: Set if MSB of result is set; cleared otherwise

Z: Set if result is $0000; cleared otherwise

C: Set if result can be rounded up; cleared otherwise

Source Form

Address

Mode

Object Code

Access Detail

HCS12

M68HC12

ETBL oprx0_xysp

IDX

18 3F xb

ORRffffffP

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