HCS12 datasheet(187/452 Pages) FREESCALE

187 / 452 page

Glossary

S12CPUV2 Reference Manual, Rev. 4.0

Freescale Semiconductor

187

Operation:

(D)

÷ (X) ⇒ X; Remainder ⇒ D

Description:

Performs signed integer division of a signed 16-bit numerator in double

accumulator D by a signed 16-bit denominator in index register X, producing

a signed 16-bit quotient in X, and a signed 16-bit remainder in D. If division

by zero is attempted, the values in D and X are not changed, C is set, and

the values of the N, Z, and V status bits are undeﬁned.

Other than division by zero, which is not legal and causes the C status bit to

be set, the only overflow case is:

But the highest positive value that can be represented in a 16-bit two’s

complement number is 32,767 ($7FFF).

IDIVS

Integer Divide (Signed)

IDIVS

$8000

$FFFF

------------------

–32,768

–1

---------------------

+32,768

CCR Details:

HIN

––––

∆∆∆∆

N: Set if MSB of result is set; cleared otherwise

Undefined after overflow or division by zero

Z: Set if quotient is $0000; cleared otherwise

Undefined after overflow or division by zero

V: Set if the result was > $7FFF or < $8000; cleared otherwise

Undefined after division by zero

C: X15

• X14 • X13 • X12 •... • X3 • X2 • X1 • X0

Set if denominator was $0000; cleared otherwise

Source Form

Address

Mode

Object Code

Access Detail

HCS12

M68HC12

IDIVS

INH

18 15

OffffffffffO

HCS12 Datasheet(PDF) 187 Page - Freescale Semiconductor, Inc

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