UJA1076 datasheet(25/47 Pages) NXP

25 / 47 page

UJA1076_2

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Product data sheet

Rev. 02 — 27 May 2010

25 of 47

NXP Semiconductors

UJA1076

High-speed CAN core system basis chip

Limiting values

Table 8.

Limiting values

In accordance with the Absolute Maximum Rating System (IEC 60134).

Symbol

Parameter

Conditions

Min

Max

Unit

voltage on pin x

DC value

pins V1, V2 and INTN

−0.3

pins TXDC, RXDC, EN, SDI, SDO, SCK, SCSN,

RSTN and WDOFF

−0.3

VV1 + 0.3

pin VEXCC

VV1 − 0.3

VV1 + 0.35 V

pins WAKE1, WAKE2 and WBIAS; with respect to

any other pin

−58

+58

pin LIMP and BAT

−0.3

+40

pin VEXCTRL

−0.3

VBAT + 0.3 V

pins CANH, CANL and SPLIT; with respect to any

other pin

−58

+58

IR(V1-BAT)

reverse current from

pin V1 to pin BAT

VV1 ≤ 5V

[1]

250

Vtrt

transient voltage

on pins

BAT: via reverse polarity diode/capacitor

CANL, CANH, SPLIT: coupling with two capacitors

on the bus lines

[2]

−150

+100

VESD

electrostatic

discharge voltage

IEC 61000-4-2

[3]

pins BAT with capacitor, CANH and CANL; via a

series resistor on pins SPLIT, WAKE1 and WAKE2

[4]

−6+6

HBM

[5]

pins CANH, CANL, SPLIT, WAKE1 and WAKE2

[6]

−8+8

pin BAT; referenced to ground

−4+4

pin TEST2; referenced to pin BAT

−1.25

pin TEST2; referenced to other reference pins

−2+2

any other pin

−2+2

[7]

any pin

−300

+300

CDM

[8]

corner pins

−750

+750

any other pin

−500

+500

Tvj

virtual junction

temperature

[9]

−40

+150

°C

Tstg

storage temperature

−55

+150

°C

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