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SC493 Datasheet(PDF) 12 Page - Semtech Corporation |
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SC493 Datasheet(HTML) 12 Page - Semtech Corporation |
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12 / 28 page ![]() SC493 12 General Description The SC493 is a step down synchronous buck DC-DC controller optimized for use in 3.3V/5V input small form- factor applications. It has the following key features: I2C control over output voltage offset, margin- ing, power-on delay, switching frequency, soft- start duration, and power save mode. Integrated bootstrap switch Programmable switching frequency from 250kHz to 1MHz to optimize board space and efficiency. Protection features — over-current, over-voltage, under-voltage, and over-temperature Power save operation — low quiescent current and ultrasonic power save Status and flag bits for diagnosis and protection purposes Supports 25A operation I2C Compatible Interface Functions The I2C interface can be used to read & write the following functions: Shutdown/Start-up of output Power-on delay and soft-start duration Output voltage offset and margining Power save mode Switching frequency Additionally, the I2C interface can be used to read status and flag bits for the following functions: Under voltage Over voltage Over temperature Current limit Brown out Did not start Discontinuous mode Power good Status and Flag Bits The status and flag bits are used to indicate the status of the converter. The status bits always indicate the current state of the converter — the status bit becomes high when the specified condition happens and turns low when the specified condition disappears. The flag bits also • • • • • • • • • • • • • • • • • • • • become high when the specified condition happens, but will not turn low when the specified condition disappears. For the above mentioned status and flag bits, only discon- tinuous mode and power good are status bits, the rest of them are all flag bits. The flag bits remain set until one of the following events occurs: The input voltage is cycled EN pin is cycled CLF bit is set Enable/Disable The converter is enabled by applying power to VDD (VDD when used refers to AVDD and PVDD together) and VIN, and pulling the EN pin high. The output voltage will rise to the voltage programmed by the FB pin and the external FB network. Pulling the EN pin low turns the converter off and clears all flag bits. The converter can also be turned on/off via the I2C interface. When the EN pin is high, setting the ENSW bit low will turn off the converter, but the flag bits will not be cleared. Setting the ENSW bit back high will turn on the converter again. Diagnosis and Protection Features When the device detects fault conditions, the SC493 sets the flag bits indicating what fault conditions have occurred. In addition, depending upon what kind of faults have been detected, the SC493 will provide appropriate actions to safeguard the device from catastrophic failures. The following paragraphs describe how these fault condi- tions are handled by the SC493. Did Not Start Indication If the FB voltage does not rise to 90% of nominal voltage after the converter is enabled, the soft-start duration has passed, and the power good delay has elapsed, the Did Not Start (DNS) flag bit is set. Note that the converter does not latch off just because this bit is set. Output Over Voltage Protection When the FB pin voltage exceeds 120% of the nominal voltage, DL goes high, forcing the low-side MOSFET on, and the OVO flag bit is set. The low side MOSFET stays on (and the high side MOSFET remains off) until the output voltage comes back into regulation. However, the CLF bit will successfully clear the OVO flag as soon as the FB falls below 120% of the normal voltage. The converter does not • • • Applications Information |
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