SC493 datasheet(24/28 Pages) SEMTECH

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SC493

The I2C General Specification

The SC493 is a read-write slave-mode I2C device and com-

plies with the Philips I2C standard Version 2.1, dated

January 2000. The SC493 has six user-accessible internal

8-bit registers. The I2C interface has been designed for

program flexibility, supporting direct format for write

operation. Read operations are supported on both com-

bined format and stop separated format. While there is

no auto increment/decrement capability in the SC493 I2C

logic, a tight software loop can be designed to randomly

access the next register independent of which register

was accessed first. The start and stop commands frame

the data-packet and the repeat start condition is allowed

if necessary.

SC493 Limitations to the I2C Specifications

The SC493 only recognizes seven bit addressing. This

means that ten bit addressing and CBUS communication

are not compatible. The device can operate in either stan-

dard mode (100kbit/s) or fast mode (400kbit/s).

Slave Address Assignment

The seven bit slave address is 0001A

2A1A0x, where A2A1A0

are set by the respective pins on the device. Bit 8 is the

data direction bit: 0001A

2A1A00 is used for a write opera-

tion, and 0001A

2A1A01 is used for a read operation.

Supported Formats

The supported formats are described in the following

subsections.

Direct Format — Write

The simplest format for an I2C write is direct format. After

the start condition [S], the slave address is sent, followed

by an eighth bit indicating a write. The I2C logic then

acknowledges that it is being addressed, and the master

responds with an 8 bit data byte consisting of the register

address. The slave acknowledges and the master sends

the appropriate 8 bit data byte. Once again the slave

acknowledges and the master terminates the transfer with

the stop condition [P].

Combined Format — Read

After the start condition [S], the slave address is sent, fol-

lowed by an eighth bit indicating a write. The I2C logic

then acknowledges that it is being addressed, and the

master responds with an 8 bit data byte consisting of the

sends the repeated start condition [Sr]. Once again, the

slave address is sent, followed by an eighth bit indicating

a read. The slave responds with an acknowledge and the

previously addressed 8 bit data byte; the master then

sends a non-acknowledge (NACK). Finally, the master ter-

minates the transfer with the stop condition [P].

Stop Separated Reads

Stop-separated reads can also be used. This format allows

a master to set up the register address pointer for a read

and return to that slave at a later time to read the data. In

this format the slave address followed by a write command

are sent after a start [S] condition. The SC493 then

acknowledges it is being addressed, and the master

responds with the 8-bit register address. The master sends

a stop or restart condition and may then address another

slave. After performing other tasks, the master can send a

start or restart condition to the SC493 with a read

command. The device acknowledges this request and

returns the data from the register location that had previ-

ously been set up.

Serial Interface

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