SC493

23

Name

Bit

Definition

Description

UPSV1

UPSV0

03h

[5]

02h

[5]

Ultrasonic Power Save

Frequency

2 bits that control the nominal minimum switching frequency in ultrasonic mode.

00 : 6.25kHz

01 : 12.5kHz

10 : 18.75kHz

11 : 25kHz

Output Voltage Control — Registers 4 and 6

These registers provide fine & coarse control over the output voltage. Margin bits can vary the the output by +/-10% in

5% steps. VFBadj can move the output by +/-9% in 0.75% steps. When both registers are used together, the change in

the output voltage is determined by the multiplication of the 2 settings, i.e., setting Margin to +10% with +9% VFBadj

will change the output by +19.9% whereas a setting Margin to +10% with -9% VFBadj will change the output by

+0.1%.

Name

Bit

Definition

Description

VFBadj4

VFBadj3

VFBadj4

VFBadj1

VFBadj0

04h[4:0]

Output Voltage

Adjustment

000xx : -9%

00100 : -8.25%

00101 : -7.50%

00110 : -6.75%

00111 : -6%

01000 : -5.25%

01001 : -4.50%

01010 : -3.75%

01011 : -3%

01100 : -2.25%

01101 : -1.50%

01110 : -0.75%

01111 : -0%

10000 : -0%

10001 : +0.75%

10010 : +1.50%

10011 : +2.25%

10100 : +3%

10101 : +3.75%

10110 : +4.50%

10111 : +5.25%

11000 : +6%

11001 : +6.75%

11010 : +7.50%

11011 : +8.25%

111xx : +9%

Margin1

Margin0

06h[2:0]

Margin Control

These bits control whether margining is disabled, set to high or set to low.

000 : Margining disabled

001 : Set output to 10% below set value

010 : Set output to 5% below set value

011 : Margining disabled

100 : Margining disabled

101 : Set output to 5% above set value

110 : Set output to 10% above set value

111 : Margining disabled

Definition of Registers and Bits (continued)