ATXMEGA128D4 datasheet(91/100 Pages) ATMEL

91 / 100 page

8135G–AVR–08/10

XMEGA D4

ADC gain stage output range is limited to 2.4 V

The amplified output of the ADC gain stage will never go above 2.4 V, hence the differential

input will only give correct output when below 2.4 V/gain. For the available gain settings, this

gives a differential input range of:

Problem fix/Workaround

Keep the amplified voltage output from the ADC gain stage below 2.4 V in order to get a cor-

rect result, or keep ADC voltage reference below 2.4 V.

ADC has increased INL error for some operating conditions

Some ADC configurations or operating condition will result in increased INL error.

In signed mode INL is increased to:

– 6 LSB for sample rates above 130 kSPS, and up to 8 LSB for 200 kSPS sample rate.

– 6 LSB for reference voltage below 1.1V when VCC is above 3.0V.

– 20 LSB for ambient temperature below 0 degree C and reference voltage below 1.3V.

In unsigned mode, the INL is increased up to a factor of 3 for the conditions above.

Problem fix/Workaround

None, avoid using the ADC in the above configurations in order to prevent increased INL

error.

ADC propagation delay is not correct when 8x-64x gain is used

The propagation delay will increase by only one ADC clock cycle for the 8x and 16x gain set-

ting, and 32x and 64x gain settings.

Problem fix/Workaround

None.

BOD will be enabled after any reset

If any reset source goes active, the BOD will be enabled and keep the device in reset if the

VCC voltage is below the programmed BOD level. During Power-On Reset, reset will not be

released until VCC is above the programmed BOD level even if the BOD is disabled.

Problem fix/Workaround

Do not set the BOD level higher than VCC even if the BOD is not used.

–

gain:

2.4

–

gain:

1.2

–

gain:

0.6

–

gain:

300

–

16x

gain:

150

–

32x

gain:

–

64x

gain:

ATXMEGA128D4 Datasheet(PDF) 91 Page - ATMEL Corporation

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