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VSC056 Datasheet(PDF) 96 Page - Maxim Integrated Products

Part # VSC056
Description  Enhanced Two-Wire Serial Backplane Controller
PDF  134 Pages
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Manufacturer  MAXIM [Maxim Integrated Products]
Direct Link  https://www.maximintegrated.com/en.html
Logo MAXIM - Maxim Integrated Products

VSC056 Datasheet(HTML) 96 Page - Maxim Integrated Products

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VSC056
Data Sheet
Revision 4.1
January 2008
3.2.85 CEh: General-Purpose Timer Count 2 (GPTC2)
The following table shows the bit assignments for the General-Purpose Timer Count 2 register.
3.2.86 CFh: General-Purpose Timer Enable (GPTE)
The following table shows the bit assignments for the General-Purpose Timer Enable register.
Register Name:
GPTC2
Address:
CEh
Reset Value:
0000_0000b
Bit
Bit Label
Access
Description
7:0
TC23-16
R/W
Timer Count
These eight bits are part of the 24-bit general-purpose timer down counter
initial count value.
Writing to this register causes the timer to update and initiate a countdown from
the new value if the timer has been enabled in the GPTE register.
Clearing this register, along with the GPTC0 and GPTC1 registers, stops the
down counter and disables the interrupt generation logic.
After a reset or power on, these bits are cleared.
Register Name:
GPTE
Address:
CFh
Reset Value:
0000_0000b
Bit
Bit Label
Access
Description
7:1
RES
R
Reserved.
0
GPTE
R/W
General-Purpose Timer Enable
This bit enables the general-purpose timer to down count and generate an
interrupt when the timer reaches zero. The general-purpose timer down counts
using a clock source that is a divide-by-three of the core clock (8.0 MHz to
12.5 MHz), resulting in a timer count resolution of 375 ns to 240 ns.
When the timer initial count is set to all 1s, the maximum timeout is greater
than four seconds when using a 12.5 MHz core clock.
When the 24-bit timer reaches a value of zero, the interrupt output of the
VSC056 is asserted. The timer then re-loads with the initial count value found
in the GPTC0, GPTC1, and GPTC2 registers and begins counting down again.
Writing a value of FFh to the BCIS register clears this interrupt.
After a reset or power on, this bit is cleared, disabling the timer and timer
interrupt.



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